Job Responsibilities:
1.Responsible for the digital module design related to high-speed interface PHY and corresponding quality assurance activities.
2.Coordinate and support Verification, DFT, PR and other related work.
3.Solve problems encountered in development efficiently and in a timely manner.
Job Requirements:
1.Solid foundation in digital design, familiar with the chip design and development flow, with experience in the full chip lifecycle from definition to mass production.
2.Able to independently complete tasks in the design phase, including debug, synthesis, Lint, CDC, STA, etc.
3.Preference will be given to candidates familiar with DP and USB protocols.
4.Major in Microelectronics, Computer Science, Communication Engineering or related fields; master’s degree or above; 3–5 years of relevant working experience.
Employee Benefits:
1.Competitive salary and comprehensive benefits package, including social insurance and housing fund, paid annual leave, holiday benefits, etc.
2.Broad career development space; the company provides abundant training and promotion opportunities to help employees achieve personal career goals.
3.Opportunities to participate in cutting-edge projects and cooperate with outstanding teams in the industry, continuously improving personal technical capabilities and industry vision.
Job Responsibilities:
1.Responsible for the design of digital modules related to high-speed interface PHY and corresponding quality assurance activities.2.Coordinate and support Verification, DFT, PR, and other teams.3.Solve development issues efficiently and in a timely manner.
Job Requirements:
1.Solid foundation in digital design, familiar with chip design and development flow, with experience in full chip development from definition to mass production.
2.Able to independently complete design tasks such as debug, synthesis, Lint, CDC, STA, etc.
3.Familiar with DP and USB protocols is a strong plus.
4.Major in Microelectronics, Computer Science, Communication Engineering or related fields; Master’s degree or above; 5–10 years of relevant experience.
Employee Benefits:
1.Competitive salary and comprehensive benefits package, including social insurance and housing fund, paid annual leave, holiday benefits, etc.
2.Broad career development space; the company provides abundant training and promotion opportunities to help employees achieve personal career goals.
3.Opportunities to participate in cutting-edge projects and cooperate with outstanding teams in the industry, continuously improving personal technical capabilities and industry vision.
Job Responsibilities:
1.Complete module-level architecture design, RTL implementation and related verification work.
2.Complete SoC architecture design and RTL integration work.
3.Participate in the analysis and optimization of product PPA (Performance, Power, Area).
4.Participate in chip synthesis, DFT and back-end design and implementation.
Job Requirements:
1.Major in Electronics, Communication, Computer or related fields; Bachelor’s or Master’s degree; at least 3 years of working experience.
2.Proficient in Verilog RTL language with practical project experience.
3.Basic understanding of low-power design.
4.Strong hands-on ability and curiosity for exploration.
5.Integrity, responsibility, team spirit and good pressure resistance.
6.Experience in synthesis, DFT and timing analysis is preferred.
Employee Benefits:
1.Competitive salary and comprehensive benefits package, including social insurance and housing fund, paid annual leave, holiday benefits, etc.
2.Broad career development space; the company provides abundant training and promotion opportunities to help employees achieve personal career goals.
3.Opportunities to participate in cutting-edge projects and cooperate with outstanding teams in the industry, continuously improving personal technical capabilities and industry vision.
Job Responsibilities:
1.Be responsible for the entire digital verification process, including test point decomposition, verification plan design and implementation, test case writing and debugging, to ensure verification completeness.
2.Research and tackle key technologies in the digital verification process to improve the performance and efficiency of digital verification.
3.Participate in the daily work of the digital verification team, including but not limited to plan discussion, design review, and test report writing and submission.
4.Formulate and optimize digital verification processes and methods according to project requirements to ensure the smooth progress of digital verification work.
Job Requirements:
1.Master's degree or above, major in Microelectronics, Computer Science, Electronic Information, Communication Engineering or related fields.
2.Familiar with SystemVerilog and UVM verification methodology, with basic knowledge of C/C++ language, Makefile, Perl or Python scripts.
3.Familiar with Verilog implementation, with ASIC or FPGA development experience.
4.Experience in peripheral (I2C, SPI, UART, etc.) verification is preferred.
5.Research background in high-speed SerDes (USB, Ethernet, HDMI, etc.) is preferred.
6.Strong hands-on ability and experience in electronic design competitions.
Employee Benefits:
1.Competitive salary and comprehensive benefits package, including social insurance and housing fund, paid annual leave, holiday benefits, etc.
2.Broad career development space; the company provides abundant training and promotion opportunities to help employees achieve personal career goals.
3.Opportunities to participate in cutting-edge projects and cooperate with outstanding teams in the industry, continuously improving personal technical capabilities and industry vision.
Job Responsibilities:
1.Responsible for testing of Retimer products (currently USB4 Retimer), report writing, and customer support.
2.Participate in overall test solution planning and EVK schematic / PCB design.
3.Cooperate with R&D team in product testing and verification, and solve technical issues encountered during development.
4.Collaborate with cross-functional teams to complete testing, mass production and subsequent iterative optimization.
Job Requirements:
1.Fresh master’s graduates in Electronic Information Engineering, Microelectronics, Communication Engineering, Electrical Engineering and Automation or related majors.
2.Understand the working principles of PLL / CDR.
3.Responsible, rigorous and detail-oriented, with good problem-solving abilities, communication and coordination skills, and teamwork spirit.
4.Strong learning ability, capable of independent thinking and proactively seeking solutions.
5.Able to adapt to long-term business trips.
Employee Benefits:
1.Competitive salary and comprehensive benefits package, including social insurance and housing fund, paid annual leave, holiday benefits, etc.
2.Broad career development space; the company provides abundant training and promotion opportunities to help employees achieve personal career goals.
3.Opportunities to participate in cutting-edge projects and cooperate with outstanding teams in the industry, continuously improving personal technical capabilities and industry vision.
Job Responsibilities:
1.Complete principle analysis, circuit design and simulation, and prepare design documentation.
2.Assist layout engineers in layout design and optimize layout floorplan.
3.Assist test engineers in developing test plans and analyzing test results.
Job Requirements:
1.Master’s degree or above in Integrated Circuits, Microelectronics, Electronic Engineering or related fields.
2.Experience in designing high-speed interface circuits such as SerDes, Retimer and Redriver; familiar with Equalization, CDR, signal integrity and other related technologies.
3.Proficient in high-speed interface protocols including USB, DisplayPort, HDMI, MIPI and PCIe.
4.Familiar with the principles and operation of high-speed measurement instruments, such as high-speed oscilloscopes, BERTs, network analyzers and spectrum analyzers.
5.More than 2 years of R&D experience in high-speed interface products; outstanding fresh graduates are also welcome (candidates available for early internship are preferred).
Employee Benefits:
1.Competitive salary and comprehensive benefits package, including social insurance and housing fund, paid annual leave, holiday benefits, etc.
2.Broad career development space; the company provides abundant training and promotion opportunities to help employees achieve personal career goals.
3.Opportunities to participate in cutting-edge projects and cooperate with outstanding teams in the industry, continuously improving personal technical capabilities and industry vision.
Job Responsibilities:
1.Complete circuit module design and simulation according to the project schedule, and prepare circuit design documents.
2.Assist layout engineers in layout design, ensure post-simulation results meet circuit design requirements, and write relevant technical documents.
3.Assist test engineers in formulating test plans and complete chip testing and verification.
Job Requirements:
1.Master’s degree or above in Integrated Circuits, Microelectronics, Electronic Engineering or related majors.
2.Familiar with semiconductor processes and flows, as well as analog IC design flow; practical project experience is preferred.
3.Solid foundation in mathematics and engineering, with passion for analog circuit design.
4.Proactive and self-motivated at work, with good teamwork spirit.
5.Excellent communication and coordination skills.
Employee Benefits:
1.Competitive salary and comprehensive benefits package, including social insurance and housing fund, paid annual leave, holiday benefits, etc.
2.Broad career development space; the company provides abundant training and promotion opportunities to help employees achieve personal career goals.
3.Opportunities to participate in cutting-edge projects and cooperate with outstanding teams in the industry, continuously improving personal technical capabilities and industry vision.
Job Responsibilities:
1.Conduct layout design for mixed-signal / analog integrated circuit modules.
2.Communicate with circuit design engineers to perform layout floorplan and implement layout design in accordance with requirements.
3.Participate in process projects including CMOS, SiGe and other related technologies.
Job Requirements:
1.Strong communication and learning abilities, team-oriented spirit and high sense of responsibility.
2.Basic English reading skills.
3.Bachelor’s degree or above in Electronics, Instrumentation, Computer Science, Communication Engineering, Physics, Mathematics or related fields.
4.Outstanding fresh graduates and interns are also welcome to apply.
Employee Benefits:
1.Competitive salary and comprehensive benefits package, including social insurance and housing fund, paid annual leave, holiday benefits, etc.
2.Broad career development space; the company provides abundant training and promotion opportunities to help employees achieve personal career goals.
3.Opportunities to participate in cutting-edge projects and cooperate with outstanding teams in the industry, continuously improving personal technical capabilities and industry vision.
Job Responsibilities:
1.Be responsible for the entire digital verification process, including test point decomposition, verification plan design and implementation, test case writing and debugging, to ensure verification completeness.
2.Research and tackle key technologies in the digital verification process to improve the performance and efficiency of digital verification.
3.Participate in the daily work of the digital verification team, including but not limited to plan discussion, design review, and test report writing and submission.
4.Formulate and optimize digital verification processes and methods according to project requirements to ensure the smooth progress of digital verification work.
Job Requirements:
1.Majors in Human Resources, Administrative Management, Business Administration or related fields; graduates of the Classes of 2026 and 2027.
2.Proficient in basic office software with strong communication and expression skills.
3.Meticulous and patient, with a strong sense of information confidentiality and time management capabilities.
4.Prior administrative experience in student clubs or student unions is preferred, such as event planning, archives management and supplies management.
(Candidates who can intern for 3–6 months and be available on weekdays are preferred.)